PXB4350EV1.1

BGA, ATM OAM Processor, -0.3 to 3.6V, 1.5 kW, 100 pF, 2500V, 16-bit microprocessor interface, 96 cell

Rated 5 Rating 5 | reviews | Write a review

Price:: US $11.70~11.95 / piece [Get Latest Price]

Reference price:

Qty (lots)	Price/lot
	US $11.70~11.95

PartNumber:: PXB4350EV1.1

Brand:: Infineon Technologies AG - Infineon | Pack: BGA | D/C: 09+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

Place Order via Escrow Service

Sold By

Ms. sales's store

(China (Mainland))

add to my favourite

100% Positive feedback

Detailed seller ratings

Visit Store

Contact Now

Esrcow Service

Place orders confidently and securely via it

Safe payments
Quick and easy transactions
Free service charges

Learn More >>

Previous Next

Products Upload time: 2011-10-28

From Other Seller

Part Number:PXB4350EV1.1
US $11.70 - 11.95
TMS320C6414TBGLZA7

US $58.00 - 65.00 / Piece
(0) Remove
RTL8102EL

US $1.00 - 2.00 / Piece
(0) Remove
Quantity:

piece

Product Summary

The PXB4350EV1.1 ATM OAM Processor is a member of the Infineon ATM622 chip set. The PXB4350EV1.1 is located at the ports of a switch so that each ATM cell passes two PXB 4340 AOP devices, one at the ingress port and one at the egress port.

Parametrics

PXB4350EV1.1 absolute maximum ratings: (1)Ambient temperature under biasPXB, TA: -40 to 85℃; (2)Storage temperature, Tstg: -40 to 125℃; (3)IC supply voltage with respect to ground, Vdd: -0.3 to 3.6V; (4)Voltage on any pin with respect to ground, Vs: -0.4 to Vdd+0.4V; (5)HBM: 1.5 kW, 100 pF; (6)VESD, HBM: 2500V.

Features

PXB4350EV1.1 features: (1)Performance up to STM-4/OC-12 equivalent ATM layer processing; (2)Flexibel throughput from1 to 687 Mbit/s bi-directional; (3)Up to 16384 connections in both directions (VPC/ VCC); (4)Temperature range from 0℃ to 70℃; (5)Multiport UTOPIA Level 2 interface in up- and downstream direction according to ATM Forum, UTOPIA Level 1 and 2 specifications; (6)16-bit microprocessor interface; (7)Cell insert/extract function; (8)32 cell FIFO buffer at UTOPIA upstream receive interface; (9)96 cell shared buffer for up to 24 PHYs at UTOPIA downstream transmit interface; (10)Boundary scan support according to JTAG; (11)Internal data stream loop at ATM and at PHY side.