TC58FVM7T5BTG65

56TSOP, 3V read-only, electrically erasable and programmable flash memory, Simultaneous Read/Write

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Price:: US $3.15~3.20 / piece [Get Latest Price]

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	US $3.15~3.20

PartNumber:: TC58FVM7T5BTG65

Brand:: Toshiba Semiconductor - Toshiba | Pack: TSOP | D/C: 09+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-10-31

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Part Number:TC58FVM7T5BTG65
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Product Summary

The TC58FVM7T5BTG65 is a 134217728-bit, 3V read-only electrically erasable and programmable flash memory organized as 8388608 * 16 bits. The TC58FVM7T5BTG65 features commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based on the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The TC58FVM7T5BTG65 also features a Simultaneous Read/Write operation so that data can be read during a Write or Erase operation.

Parametrics

TC58FVM7T5BTG65 absolute maximum ratings: (1)VDD Supply Voltage:-0.6V to 4.6V; (2)Input Voltage:-0.5V to VDD+0.5V(≦4.6V); (3)Input/Output Voltage:-0.5V to VDD+0.5V(≦4.6V); (4)Maximum Input Voltage for A9, OE and RESET:13.0V; (5)Maximum Input Voltage for WP/ACC:13.0V; (6)Power Dissipation:600mW; (7)Soldering Temperature (10s):260℃; (8)Storage Temperature:-55℃ to 150℃; (9)Operating Temperature:-40℃ to 85℃; (10)Output Short-Circuit Current:100mA.

Features

TC58FVM7T5BTG65 features: (1)Simultaneous Read/Write; (2)Page Read; (3)Auto Program, Auto Page Program; (4)Auto Block Erase, Auto Chip Erase; (5)Fast Program Mode/Acceleration Mode; (6)Program Suspend/Resume; (7)Erase Suspend/Resume; (8)Data polling/Toggle bit; (9)Password block protection; (10)Block protection/ Boot block protection; (11)Automatic Sleep, support for hidden ROM area; (12)Common Flash memory Interface (CFI); (13)Power supply voltage: VDD = 2.7V to 3.6V ; (14)Operating ambient temperature:Ta = -40℃ to 85℃; (15)Organization:8M * 16 Bits; (16)Mode control Compatible with JEDEC standard commands; (17)Erase/Program cycles: 105 cycles typ; (18)Block erase architecture: 8 * 8 Kbytes / 255 * 64 Kbytes; (19)Bank architecture: 8M Bits * 16 Bank.