SN74AHCT16374DGGR

16-bit, edge-triggered D-type flip-flop, TSSOP-48, –0.5 V to 7 V, ±20 mA, Latch-Up Performance

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Price:: US $0.54~0.58 / piece [Get Latest Price]

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	US $0.54~0.58

PartNumber:: SN74AHCT16374DGGR

Brand:: Texas Instruments - TI | Pack: TSSOP | D/C: 05+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-10-28

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Part Number:SN74AHCT16374DGGR
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Product Summary

The SN74AHCT16374DGGR is a 16-bit edge-triggered D-type flip-flop with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The SN74AHCT16374DGGR is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The SN74AHCT16374DGGR can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels at the data (D) inputs.

Parametrics

SN74AHCT16374DGGR absolute maximum ratings: (1)Supply voltage range, VCC: –0.5 V to 7 V; (2)Input voltage range, VI: –0.5 V to 7 V ; (3)Output voltage range, VO: –0.5 V to VCC + 0.5 V; (4)Input clamp current, IIK (VI < 0): –20 mA; (5)Output clamp current, IOK (VO < 0 or VO > VCC): ±20 mA; (6)Continuous output current, IO (VO = 0 to VCC): ±25 mA; (7)Continuous current through each VCC or GND: ±75 mA; (8)Package thermal impedance, θJA: 58℃/W; (9)Storage temperature range, Tstg: –65 to 150℃.

Features

SN74AHCT16374DGGR features: (1)Members of the Texas Instruments Widebus Family; (2)EPIC (Enhanced-Performance Implanted CMOS) Process; (3)Inputs Are TTL-Voltage Compatible; (4)Distributed VCC and GND Pins Minimize High-Speed Switching Noise; (5)Flow-Through Architecture Optimizes PCB Layout; (6)Latch-Up Performance Exceeds 250 mA Per JESD 17; (7)ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0); (8)Package Options Include Plastic Shrink, Small-Outline (DL), Thin Shrink, Small-Outline (DGG), and Thin Very, Small-Outline (DGV) Packages and 380-mil, Fine-Pitch Ceramic Flat (WD) Package, Using 25-mil Center-to-Center Spacings.