Product Summary
The DS90CF563MTD/NOPB is a transmitter. the DS90CF563MTD/NOPB converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. The DS90CF563MTD/NOPB receiver converts the LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 65 MHz, 18 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65 MHz clock, the data throughput is 171 Mbytes per second. The DS90CF563MTD/NOPB is offered with falling edge data strobes for convenient interface with a variety of graphics and LCD panel controllers.
Parametrics
DS90CF563MTD/NOPB absolute maximum ratings: (1)Supply Voltage (VCC): -0.3V to +6V; (2)CMOS/TTL Input Voltage: -0.3V to (VCC + 0.3V); (3)CMOS/TTL Output Voltage: -0.3V to (VCC + 0.3V); (4)LVDS Receiver Input Voltage: -0.3V to (VCC + 0.3V); (5)LVDS Driver Output Voltage: -0.3V to (VCC + 0.3V); (6)LVDS Output Short Circuit Duration: Continuous; (7)Junction Temperature: +150℃; (8)Storage Temperature: -65℃ to +150℃; (9)Lead Temperature (Soldering, 4 sec): +260℃; (10)Maximum Package Power Dissipation @ +25℃: 1.98W.
Features
DS90CF563MTD/NOPB features: (1)20 to 65 MHz shift clk support; (2)Up to 171 Mbytes/s bandwidth; (3)Cable size is reduced to save cost; (4)290 mV swing LVDS devices for low EMI; (5)Low power CMOS design (< 550 mW typ); (6)Power-down mode saves power (<0.25mW); (7)PLL requires no external components; (8)Low profile 48-lead TSSOP package; (9)Falling edge data strobe; (10)Compatible with TIA/EIA-644 LVDS standard; (11)Single pixel per clock XGA (1024 x 768); (12)Supports VGA, SVGA, XGA and higher; (13)1.3 Gbps throughput.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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DS90CF563MTD/NOPB |
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