Product Summary

The MT46V32M8P-75IT is a Double Data Rate (DDR) SDRAM. It uses a double data rate architecture to achieve high-speed operation. A single read or write access for the MT46V32M8P-75IT effectively consists of a single 2n-bit-wide, one-clock-cycle data transfer at the internal DRAM core and two corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins. The MT46V32M8P-75IT provides for programmable READ or WRITE burst lengths of 2, 4, or 8 locations. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst access.

Parametrics

MT46V32M8P-75IT absolute maximum ratings: (1)VDD supply voltage relative to VSS:–1V to +3.6V; (2)VDDQ supply voltage relative to VSS:–1V to +3.6V; (3)VREF and inputs voltage relative to VSS:–1V to +3.6V; (4)I/O pins voltage relative to VSS:–0.5V to VDDQ + 0.5V; (5)Storage temperature (plastic):–55℃ to +150℃; (6)Short circuit output current:–50mA.

Features

MT46V32M8P-75IT features: (1)VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V; (2)VDD = +2.6V ±0.1V, VDDQ = +2.6V ±0.1V (DDR400); (3)Bidirectional data strobe (DQS) transmitted/received with data, that is, source-synchronous data capture (x16 has two - one per byte); (4)Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle; (5)Differential clock inputs (CK and CK#); (6)Commands entered on each positive CK edge; (7)DQS edge-aligned with data for READs; centeraligned with data for WRITEs; (8)DLL to align DQ and DQS transitions with CK; (9)Four internal banks for concurrent operation; (10)Data mask (DM) for masking write data (x16 has two - one per byte); (11)Programmable burst lengths (BL): 2, 4, or 8; (12)Auto refresh:64ms, 8192-cycle(Commercial & Industrial), 16ms, 8192-cycle (Automotive); (13)Self refresh (not available on AT devices); (14)Longer-lead TSOP for improved reliability (OCPL); (15)2.5V I/O (SSTL_2-compatible); (16)Concurrent auto precharge option supported; (17)tRAS lockout supported (tRAP = tRCD).

Diagrams

MT46V32M8P-75IT block diagram

MT46H128M16LFCK-5 IT:A
MT46H128M16LFCK-5 IT:A

IC DDR SDRAM 2GB 200MHZ 60VFBGA
Data Sheet
0-1000: $7.60
MT46H128M16LFCK-6 IT:A
MT46H128M16LFCK-6 IT:A

IC DDR SDRAM 2GB 200MHZ 60VFBGA
Data Sheet
0-1000: $7.60
MT46H128M32L2KQ-5 IT:A
MT46H128M32L2KQ-5 IT:A

MOBILE LPDDR 1.8V 200MHZ 5NS
Data Sheet
0-1000: $11.15
MT46H128M32L2MC-5 IT:A
MT46H128M32L2MC-5 IT:A

IC DDR SDRAM 2GB 200MHZ 240WFBGA
Data Sheet
0-1000: $11.15
MT46H128M32L2MC-6 IT:A
MT46H128M32L2MC-6 IT:A

IC DDR SDRAM 2GB 200MHZ 240WFBGA
Data Sheet
0-1000: $11.15
MT46H16M16LF 4
MT46H16M16LF 4
Other

Data Sheet
Negotiable